李祥宇是 Ansys 台灣總經理，李祥宇於 2018 年加入 Ansys。具有 25 年的銷售和管理經驗。在全球領先的資訊科技公司中擔任總經理和銷售總監職務。業務範圍包含商用應用軟體，諮詢服務，計算機硬體和製造設備，業務區域涵蓋大中華和東南亞地區。

在加入 Ansys 前，他曾於美商 JDA Software 擔任大中華區的經理，美商惠普科技公司擔任副總經理及於美商甲骨文公司擔任業務總監。李祥宇擁有中原大學工業工程學士學位。

Dave Firth, With nearly thirteen years of tenure with Ansys and twenty years of experience in numerical analysis, Anthony Dawson has dedicated his career to simulation. Currently, the Vice President of Ansys Customer Excellence (ACE), Anthony leads Ansys’ global engineering teams. The mission for ACE is clear—make Ansys customers successful. Today, Anthony shares one of the latest innovations from ACE, AnsysGPT- an AI-powered virtual support engineer. Built using ChatGPT technology on an Open AI Microsoft Azure platform, fusing the expertise of accredited Ansys engineers with the dynamism of artificial intelligence and machine learning to deliver a general-use tool capable of providing rapid customer support. AnsysGPT empowers customers to independently find solutions to questions, enhancing the ACE support offerings. Through hands-on customer partnership and cutting-edge technological solutions, ACE is committed to scaling and influencing global innovation while tailoring Ansys technology to better serve customers in 2025 and beyond.

1. Why good systems engineering is important w/ examples of ontology - component to systems of systems . ex: Show Systems Architecture/Dynamics of a DC, Automotive system.
2. Share Complexity and Scale aspects with examples across industries.
3. Why it is important to address Multi-physics & Multi-scale challenges in SDLC. Use examples in Hi-tech
4. How AI will accelerate and impact Simulation – Give examples of Top-down/Bottom-up approaches including new foundational models ( zoom out from an industry perspective)
5. Emphasize the importance of Process transformation (Shift Left/Up) and ecosystem play. Wrap with the need for skills transformation and workforce development.

Integrating a wider range of device types by adopting heterogeneous integration technology enable increasingly important system level integration for data-driven era(AI application). “AI on Chip” is considered as a core element of every advanced smart system in the future. The presentation is to share the key aspects of “AI-on-Chip Program” in Taiwan as well as the achievement and Special-Interests Groups (SIGs) of AI-on-Chip Taiwan Alliance (AITA). AI-on-Chip program keeps the momentum to speed up the market-oriented research and development to fulfill the domain-specific needs of smart living, quality of life and sustainable environment by adopting both innovative Silicon IP and advanced heterogeneous integration technology. It includes “AI Chip Application”, “Heterogeneous AI Chip Integration”(Wafer-Level Chiplets Integration), “Emerging AI Processing Architecture” and “AI System Software” technologies. All these results will be further leverage Taiwan’s strength of semiconductor and ICT societies and continue to contribute to the world with its advances in AI Technologies.

1. 展現如何以系統級思維整合供電、散熱等研發成果，重塑資料中心設計架構
2. AI基礎設施瓶頸再思考，促進技術交流與創新合作
3. 強化電源系統智能設計，推動台灣產業升級

The transition from single SoC designs to multi-die System-in-Package (SiP) architectures is gaining momentum due to improved integration, reduced footprint, and enhanced performance. These multi-die systems use a variety of packaging technologies, including 2D, 2.5D, and 3D stacked die configurations. However, this increased complexity introduces new signoff challenges. Traditionally, thermal, power, and signal integrity (SI) analyses are performed separately for each die, often with conservative guardbands. In a multi-die or 3DIC environment, this approach can result in overdesign or silicon failure due to inaccurate cross-die interaction modeling. As a result, system-level signoff with foundry-certified accuracy is essential—particularly to address thermal and electromigration/IR-drop (EMIR) issues. Ansys provides a comprehensive suite of solutions to support advanced multi-die and 3DIC packaging. These tools enable accurate, full-system analysis of thermal, power integrity, and SI, ensuring robust and reliable signoff for next-generation designs.

Demonstrating the enhanced efficiency of addressing power reliability issues in real projects using Totem, and the accelerated performance achieved through Totem-SC.

For Analog Design Flow, Post-Layout and EM/IR simulations are critical as the sign-off requirements. These verifications are time consuming regarding the complexity of RC networks. With the advanced RC analysis tool “ParagonX”, designer can precisely predict the RC effects for layout revision after the simulation. Which means simulation time could be reduced from weeks to days by reducing multiple simulation iterations.

Introduce the challenges of advanced package, including modeling extraction, simulation and verification of high-speed signals, and EMIR analysis.

This presentation explores the innovative S-SiCap^TM (Stack Silicon Capacitor) by introducing the fabrication process, key features, and potential applications. Subsequently, we delve into the simulation of S-SiCap using RaptorX, outlining the methodology, experimental validation, and accuracy improvements that enable design optimizations.

In today’s data-driven world, safeguarding sensitive information during external file sharing is crucial. This presentation explores how optiSLang, an advanced AI tool, can be harnessed to analyze and classify downloaded files based on their risk levels before sharing them with external vendors. By implementing intelligent risk assessment and automated classification, organizations can enforce tailored access restrictions, ensuring compliance and data security. The session will showcase a practical workflow using optiSLang’s machine learning capabilities to streamline risk evaluation, minimize human error, and enable secure, efficient collaboration with external partners.

為迎接AI時代的來臨，本演講將探討高頻高速材料的發展趨勢。在高速運算需求快速成長的背景下，訊號完整性（SI）已成為影響PCB材料選擇的關鍵參數之一。我們將介紹EM-896等材料系列在不同頻率下的介電常數（Dk）穩定性與介質損耗（Df）表現，並進一步分析其在PCIe 6/7及800G/1.6T交換器應用中的選材策略與未來發展方向。此外，亦將說明在模擬軟體應用中，材料參數設定的原則，模擬與實測結果的差異比對，以及關鍵參數設定時需留意的細節與建議事項。

This paper presents an automated floor planning method for circuits with multiple spiral inductors using a machine learning-based optimization technique. Due to the complex and non-linear nature of inductive coupling, manual design is often inefficient and error-prone. We propose an adaptive metamodel of optimal prognosis (AMOP)-based optimization flow that integrates electromagnetic and circuit simulation to automatically size and place spiral inductors. This approach reduces design time and effort while improving performance reliability. A high-speed driver circuit with RF design is used to validate the method.

With the rapid growth of AI and HPC, chiplet architectures and advanced packaging technologies are quickly becoming mainstream. These trends introduce new challenges, including larger package sizes, multilayer substrate structures, and high-density routing. To accelerate early-stage design evaluation, this work utilizes optiSLang to integrate the design and analysis workflow. By identifying key influencing factors and developing predictive electrical models, the proposed methodology enables fast and accurate signal integrity (SI) assessment of package substrates. This approach helps substrate designers efficiently establish design guidelines during the early phase, thereby improving design accuracy and development efficiency.

As AI technologies continue to evolve rapidly, the demand for computing power is growing. High-bandwidth, low-latency interconnects between AI GPUs are becoming increasingly critical in data centers and high-performance computing systems. Silicon photonics (SiPh) is emerging as a key enabler in addressing these scaling challenges, particularly in both scale-up and scale-out architectures. Two notable technologies tracks in this domain are pluggable optical transceivers and the emerging field of co-packaged optics.

Recent outcomes from our ongoing work in advanced optical components, packaging, and assembly will be shared.

本簡報探討在傳統封裝中，高速SerDes設計所面臨的挑戰與協同設計策略。儘管先進封裝日益受到關注，但目前多數商用產品仍依賴傳統封裝，而常忽略 SI/PI 與熱效應間的交互影響。透過多物理場模擬方法，我們分析訊號完整性，電源完整性與散熱之間的設計取捨對SerDes效能的影響，並分享實務設計與模擬技巧，說明如何在傳統封裝下實現符合現代SerDes需求的電熱協同優化。

隨著電子產品邁向高密度、高效能與輕薄化，上板級焊點（Solder Joint）可靠度議題為未來關鍵挑戰。本內容將說明如何自設計階段即導入可靠度思維，運用ANSYS Mechanical與 LS-DYNA ISPG方法，進行封裝材料選擇與結構優化。透過此方法，可有效預測焊點失效風險，並成功模擬回流焊後的焊球成形及壽命預測，提升預測準確性，來協助工程團隊在產品初期即掌握潛在風險，確保焊點可靠度與整體產品穩定性。

As the next generation of satellite communications demands higher data rates, lower latency, and seamless global coverage, array antennas are becoming central to enabling flexible, highperformance beamforming. With the rise of multi-orbit satellite networks and high-altitude platform systems (HAPS), antenna design must adapt to increasingly dynamic and layered connectivity requirements. This talk explores key innovations in active phased array antennas—focusing on high-frequency operation, thermal management, and scalable architectures—to meet the evolving needs of tomorrow’s satellite communications ecosystem.

光與電 高頻高速訊號模組化模擬技術應用

Abstract This presentation investigates noise crosstalk analysis for desense engineering in complex electronic systems, crucial as devices become more integrated. It covers:
● Key Objectives:
● Crosstalk Mechanism Comprehension: Investigate inductive, capacitive, and conductive coupling.
● Crosstalk Source Identification: Locate noise originating from switching power supplies, high-speed digital signals, and RF components.
● System Desense Impact Quantification: Measure how crosstalk degrades receiver sensitivity and signal integrity.
● Advanced Analysis Technique Demonstration: Showcase frequency domain and EM simulation.
● Mitigation Strategy Discussion: Explore optimized PCB layout, component selection, filtering, shielding, and system-level integration.
The aim is to provide engineers with a deeper understanding and practical tools to analyze, predict, and mitigate noise crosstalk in desense engineering.

Speaker antennas are commonly found in laptop products, and their grounding often adopts a gasket to connect to the system ground. However, the location of the gasket affects not only the antenna’s performance but also the degree of vibration when the speaker is operating. In this study, we used the advanced AI tool OptiSLang to collect simulation data from two of ANSYS’s CAD tools — HFSS and Mechanical — and identified solutions that simultaneously meet both electronic and mechanical specifications. Therefore, when facing multi-physics challenges, OptiSLang can be a powerful tool to help resolve complex problems.

This study investigates the risk of Ball Grid Array (BGA) cracking in Printed Circuit Board Assemblies (PCBAs) during packaging drops in the transportation process. Strain gauge measurements and LS-DYNA simulations were used to identify critical drop orientations and analyze failure behavior. By comparing pass and fail cases, a BGA crack risk indicator was established to evaluate the protective performance of packaging designs while balancing simulation accuracy and computational cost. As AI chips grow in size and complexity, the risk of solder joint failure increases, highlighting the importance of ball-level reliability. Traditional manual solder ball placement is time-consuming, whereas automated processes can place a ball in one second, making automation essential for the mass production of large-package AI chips.

This study explores the application of Sherlock, a reliability prediction and analysis tool, to evaluate the performance and durability of PCBA subjected to thermal stress cycling.

隨著電子產品日益複雜及開發週期的縮短，板級可靠度模擬已逐漸成為早期預測效能的重要工具。然而，不同模擬情境（如溫度循環、彎曲應力等）下的適用性與準確度，仍是業界關注重點。
本演講將分享模擬軟體於板階效能預測中的應用經驗，探討模擬建立之邏輯、條件假設，並透過與實驗數據比對，進行準確度驗證。最後，依據開發經驗分享模擬過程中遇見的挑戰與未來展望。

行星減速機設計的要點包含: 減速比配置、機構運動設計、載荷結構分析、間隙參數研究、零件選用等項目。 運用 Ansys Motion 進行行星減速機開發設計、多撓體動力分析， 可精確預測行星減速機運動狀況、齒輪結構受力分布、傳動效率等設計目標，協助在設計初期即掌握關鍵性能表現。

富田電機以自身經驗闡述模擬軟體如何協助研發人員在設計初期進行馬達選型、效率提升、功耗降低以及熱管理等完整模擬預估，此外，也分享模擬結果與實測數據的比對驗證，確保設計準確性。

基於近年國內外市場供需的改變，無人機馬達相關需求再度出現。在此領域，無人機系統客戶往往不習慣或無法直接提供需求馬達的額定規格，反而提供最大推力、期望槳葉尺寸等規格。在此分享馬達設計工程師如何運用客戶所提供的需求分析適當的額定參數，並透過模擬完善設計。並分享與馬達設計相關的無人機系統經驗。

利用案例，簡單介紹如何從模擬來輔助設計並用實際驗證來確認設計，大致上是著重在TN curve 與 efficiency 上面

介紹國際氫能車輛發展趨勢與相關法規標準，及車輛中心於氫燃料電池車輛安全性領域之研究成果。包含氫能系統搭載結構之強度、高壓氫系統充放氫過程模擬、氫氣洩漏與通風擴散行為模擬研究、安全監控機制建構，氫能載具碰撞安全等，藉由CAE模擬與實驗相輔相成，提升氫燃料車輛安全性設計之完整性與可靠度。

從Medini軟體出發，說明產品開發時如何從客戶應用規格拆解出DFMEA，有了這些DFMEA項目後，結合熱、力、電、磁個物理場模擬軟體，做全面性的產品開發。

For power IC (Integrated Circuit) industry, one of main goals is to bring higher power conversion efficiency and power density for power device applications such as datacenters and 5G.
Integrating driver and MOSFET (DrMOS) into an IC increases power density and efficiency when compared to a conventional, discrete MOSFET with an individual driver IC.
This session will introduce several cases of DrMOS optimization design with Ansys Q3D.

The integration of magnetic components, along with sharing a few practical case studies, highlight the technical and challenging aspects from an industry perspective.

為了滿足伺服馬達高功率密度以及高度客製化的需求，透過OptiSLang快速完成最佳化設計，提升產品競爭力。

因應太空環境以及車用安全的嚴苛條件下，輝能科技成功地設計出太空電池模組與車用電池模組，並透過ANSYS Mechanical以及LS-DYNA模擬驗證振動及衝擊測試，進而縮短電池模組在機構設計上的開發時程，同時也成功通過法規規範下的振動及衝擊實測。

離岸風機的設計需承受25年以上風、浪、流高週次循環載重，導致疲勞損傷成為設計一大重點。本講聚焦 IEC/DNV 對於疲勞損傷的要求，以及TYLin如何使用ANSYS自動化開發進行高效且精確的疲勞設計。